Senior/Staff STA Engineer

  • Senior/Staff STA Engineer

Job Description:

In this position, you will be mainly responsible for static timing analysis and timing closure of the design. Your scope of work includes but not limited to
• Sanity checks on timing constraint files (SDC)
• Work with front end team/customers on refining timing constraints
• Perform intensive timing analysis in all PVT corners and modes
• Drive for timing closure in all PVT corners and modes
• Support functional ECO timing closure
• Work with process foundry in defining the timing sign-off criteria of the chip
• Work with physical design engineers to ensure the chip is meeting all design specs (die-size, timing, power and etc)
• Perform timing sign-off checklist and reviews 
• Develop timing convergence methodology to improve overall design efficiency and productivity
• RTL synthesis (optional)

Limited Requirement

DEGREE:
The ideal candidate should have a minimum 5-8 years of experience in related field for staff level, and at least 3 years for senior level. The candidate should be knowledgeable in static timing analysis with hands-on experience in performing timing ana
Other Requirement:
The ideal candidate should have a minimum 5-8 years of experience in related field for staff level, and at least 3 years for senior level. 
The candidate should be knowledgeable in static timing analysis with hands-on experience in performing timing analysis and timing closure for multiple (more than 20) PVT corners and modes in a multi clock domain and complex design. The candidate needs to possess the skills and knowledge to negotiate with front end team/customers on refining timing constraints or changing the RTL when the chip is not able meet timing specs due to design limitation. In addition to that, one needs to have general knowledge in all aspects of the ASIC design flow. Knowledge in RTL synthesis, P&R, DFT and gate level simulation is a plus. Hands-on experience in advanced chip design with deep sub-micron technology (65nm and below) is a must. Problem solving capability in low power design, signal integrity and cross coupling noise is required. The ability to work with and develop relationships with multiple function groups and execute in a fast paced environment is essential. 
We are looking for independent, energetic, dynamic, proactive and responsible person to fill this position. For staff level position, the candidate is required to have working experience in leading role, and portray strong interpersonal, leadership and management skills.

 

Post Date:2014-10-27