DESIGN ENGINEER – ETHERNET PHY

Job Description
In this highly challenging design role, the IC designer is to work with a team for the development of Ethernet 10/100 PHY in 0.13 um and below technologies. The responsibility includes design creation, characterization, integration and optimization, and for silicon debug. Driven by design requirements, the designer needs to develop special circuit and logic components in the PHY to integrate with the MAC. Based on the existing Ethernet PHY technology this company has, one needs to go over the entire design gamut that covers design specification to final post-layout simulation. Silicon characterization and debug including FIB experiment to identify and optimize the design. The position is to work closely with other engineering and product marketing teams for end product development. Deep understanding of the application of the Ethernet technology in various domains is essential, system SOC integration and interface needs to be continuously strengthened.

Qualifications

The ideal candidate will have a minimum of 10 years in the development of analog circuit with hands-on experience in the design and development of Ethernet PHY chips. Exceptional knowledge from chip specification, design development, testing, SOC interface and integration is required. Must be very familiar and knowledgeable with circuit design of ADC/DAC/PLL, Equalization and Base Line Wander (BLW) Compensation. Working experience in doing audio and voice codec is a plus. The ability to work with and develop relationships with multiple function groups and execute in a fast paced environment is essential.

Required Education:

BS/MS in Electrical Engineering or Computer Engineering required. Advanced degree in an engineering discipline is preferred.