Sr. Analog Design Engineer

Job Description
Perform architecture design and define transmit data path; receive data path on analog block; design input and output buffer of twist pair, PLL, Bandgap, current source data coding and decoding circuits; develop IC design, simulation, timing and verification methodology; generate timing and verification plans; perform physical layout for high performance and critical circuits and test chip validation and debug. Perform CUP I/O with high performance ESD

Qualifications
B.S. (or foreign degree equivalent) in Electrical Engineering Technology or related, plus 5 years working experience.

Contact:
Please mail resume to 3900 Freedom Circle, Suite 101, Santa Clara, CA 95054